Dynamic Interrupt Controller and Conflict Management for Transactional Memory in Embedded System
نویسندگان
چکیده
In hardware transactional memory system, selecting an interrupt handling mechanism is the one of problems. To handle interrupts occur in transactions, all systems need special mechanisms but these require more hardware or software resources, so this is not acceptable to the embedded system that has limitations. In this paper, we proposed interrupt handling process and interrupt controller that distributes interrupts to proper core in the system. Then we present performance metrics for the system and how transactional memory policies affect to the metrics. Simulation results show that roughly 80% of interrupts that occur in transaction can be improved and eager conflict detection, polite and polka contention managements are proper polices for the proposed system.
منابع مشابه
Configurable Version Management Hardware Transactional Memory for Multi-processor Platform
Programming on a shared memory multiprocessor platforms in an efficient way is difficult as locked based synchronization limits the efficiency. Transactional memory (TM) is a promising approach in creating an abstraction layer for multi-threaded programming. However, the performance of TM is application-specific. In general, the configuration of a TM is divided into version management and confl...
متن کاملUsing Software Transactional Memory in Interrupt-driven Systems
Transactional memory presents a new concurrency control mechanism to handle synchronization between shared data. Dealing with concurrency issues has always been a difficulty when writing operating system software and using transactions aims to simplify matters. This thesis presents a framework for understanding how interrupt-driven device drivers can benefit from using transactional memory. A m...
متن کاملImplementation of Core-Lock mechanism as a Data Synchronization Method in Embedded Multi-core Systems
Multi-core processors have become prevalent in the embedded systems for High-performance computations especially in the high-end digital applications. One of the major challenges in multi-core system is Data synchronization which facilitates the simultaneous execution of multiple threads in the same processor environment. Traditional methods solved the Data Synchronization issues using Lock bas...
متن کاملEnergy and Throughput Efficient Transactional Memory for Embedded Multicore Systems
We propose a new design for an energy-efficient hardware transactional memory (HTM) system for power-aware embedded devices. Prior hardware transactional memory designs proposed a small, fully-associative transactional cache at the same level as the L1 cache. We propose an alternative design that unifies the transactional and L1 caches, and provides a small victim cache to reduce effects of cap...
متن کاملEmbedded-TM: Energy and complexity-effective hardware transactional memory for embedded multicore systems
We investigate how transactional memory can be adapted for embedded systems. We consider energy consumption and complexity to be driving concerns in the design of these systems and therefore adapt simple hardware transactional memory (HTM) schemes in our architectural design. We propose several different cache structures and contention management schemes to support HTM and evaluate them in term...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 2015